1. Field of the Invention
The present invention relates to a power down circuit for reducing power consumption of an electronic circuit apparatus.
2. Related Background Art
A conventional power down circuit is largely classified into two methods: a first method is to suppress power consumption by controlling a bias voltage of a particular block in an electronic circuit, and a second one is that an entire circuit is connected to a power source through a switch, which is formed by a MOS-type field effect transistor (hereinafter, called as a MOS transistor), and the power consumption is suppressed by stopping the supply of the power source to an entire circuit by turning off the switch for a certain time period (Refer to Japanese Patent Laid Open No. 1993-160704).
FIG. 1 shows an example of the bias circuit controlled by the conventional power down circuit according to the first method. In the configuration of FIG. 1, the MOS transistor M21 is a transistor having a low threshold voltage and when a power down control signal (hereinafter, called as a control signal) PD becomes high-level, a MOS transistor M31 and a MOS transistor M41, into which the control signal PD is input with an inversed polarity, are being OFF state, said bias circuit being looked upon as being under a normal operation and controls the bias current of the back-stage circuit in accordance with the bias voltage VB. On the other hand, when the control signal PD becomes low-level, both MOS transistors M31, M41 turn on, and gate-source voltages (hereinafter, called as VGS) of MOS transistors M11, M21 become zero volt, thereby, the consumption current of the circuit is reduced to come into a power down state.
Next, as shown in FIG. 2, in place of the MOS transistor M41 in the circuit of FIG. 1, such a configuration is known as a MOS transistor M51, with an inversion signal of the control signal PD being entered into the gate, is connected between the drain of the MOS transistor M21 and the gate of the MOS transistor M11. According to this configuration, when the control signal PD is high-level, the MOS transistor M31 is being OFF state, the MOS transistor M51 turns on, the MOS transistor M21 becomes on-state, and the bias circuit usually becomes a normal operating state. On the other hand, when the control signal PD becomes low-level, the MOS transistor M31 turns on, the MOS transistor M51 is being OFF state, the MOS transistor M21 is being OFF state, and the bias circuit becomes power down state. Thus, with the MOS transistor M51 standing in between, without deteriorating the characteristics of the circuit including the MOS transistor M21 having a low voltage threshold, a low noise power down circuit can be realized.